BEE2 Berkeley Wireless Research Center, UC Berkeley

Berkeley Emulation Engine 2


Design Repository

BEE2 Support


Important Message for BEE2 Users

Mar 14, 2008: We put together a map of all the BEE2s in the wild here. Let us know if we got any of the information about you wrong.
Mar 13, 2008: We've updated the "wiki" links to point to the new design repository. As always, please let us know about dead links be e-mailing
Old News: The original BEE2 Wiki has been disabled due to security issues. All contents can still be access from the static link If you cannot find the particular page, try add ".html" to the URL, and let us know at the below address

All BEE2 related support issues shall only be directed to, where your questions will be promptly replied within 1 business day. Do not email individual BEE2 team members or staffs directly, as such emails will be discarded with no response.
Old News: If you are a currentBEE2 user you should also sign up for the BEE2 user mailing list. To sign up, please use this URL:, where listname should be bee2-users. We will make periodic BEE2 related announcements on that mailing list.
Old News: We are in the process of migrating to the new Design Repository system for all BEE2 related research activities across various projects, groups, and universities. Please click on the Design Repository button above for more information and progress on the migration.

BEE2 Information

The BEE2 system is designed to be a modular, scalable FPGA-based computing platform with a software design methodology that targets a wide range of high-performance applications, such as:
  • Real-time radio telescope signal processing
  • Cognitive radio systems
  • Hyperspectral image processing
  • E & M antenna simulation
  • Bioinformatics sequence matching
  • Simulation of large-scale, ad-hoc and traditional networks
  • ECAD tool acceleration
  • Scientific computing
  • Computer architecture emulation

The modular system architecture can not only provide orders of magnitude reduction in overall cost and design time, but it also closely tracks the early adoption of state-of-the-art IC fabrication by FPGA vendors. Users of the BEE2 have the freedom to choose the appropriate number of computational modules needed to tackle the application at hand, and to rapidly reconfigure to switch to a different application.

Module Information
The BEE2 is a general purpose processing module based on five, high-performance Xilinx FPGAs (Virtex II Pro 70). In addition to the large amount of processing fabric provided by the FPGAs, the BEE2 also provides up to 20GB of high-speed, DDR2 DRAM memory. Each of the five FPGAs has four independent channels to DDR2 DIMMs which provides very high memory bandwidth. Finally, the FPGAs on the BEE2 are highly connected with both high-speed, serial and parallel links.

The FPGAs are laid out in a star topology with four user FPGAs in a ring and one control FPGA connected to each user. The user FPGAs each have four independent high speed serial channels (4 bonded MGTs) which are capable of transfering data at 10Gbps through CX4 connectors (both copper and fiber). The user FPGA ring consists of parallel connections of 138 high-speed LVCMOS traces between the FPGAs which can run at a maximum of 400Mbps. The control FPGA has two high-speed serial channels, 64 LVCMOS traces to each user FPGA, and connections to common peripherals such as 10/100 ethernet, USB 1.1, RS232 serial, DVI, and GPIOs.

Detailed information about the BEE2 module, including its architecture, links to data sheets, BOM, and source code can be found here:
  • 2004 International SKA meeting poster (pdf)
  • A Case for High End Reconfigurable Computing (pdf)
  • BEE2: A Multi-Purpose Computing Platform for Radio Telescope Signal Processing Applications (pdf)
  • BEE2: A High-End Reconfigurable Computing System (pdf)
  • Physical Design and Implementation of BEE2: A High End Reconfigurable Computer (MS Report) (pdf)


Professor Bob Brodersen
Professor John Wawrzynek

Research Associates
Don Backer (UCB, Astro)
Dan Werthimer (SSL)
Melvyn Wright (UCB, RAL)

Industrial Liaisons
Kees Vissers (Xilinx)
Bob Conn (Research Triangle Inc.)

Graduate Students
Kevin Camera
Greg Gibeling
Alexander Krasnov
Yury Markovskiy
Adam Megacz
Hayden So
Norm Zhou

Technical Staff
Dan Burke
Chen Chang
Henry Chen
Ken Lutz
Susan H. Mellers
Brian Richards


Projects using the BEE2:

RAMP Project - The RAMP project uses the BEE2 as its emulation platform.

GSRC Wireless Home Gateway - The BEE2 is used as a reconfigurable media router with on-the-fly media transcoding.

BORPH - Berkeley OS for ReProgrammable Hardware. Uses the BEE2 as a platform for developing an OS for FPGAs by integrating hardware resource management with Linux.

Cognitive Radio Research - The BEE2 is used as a general purpose testbed for CogRad research and to generate digital baseband in testing.

Deep Space Network - BEE2 is the heart of a high-bandwidth spectrum analyzer used by the DSN.

Related projects:

BRASS Reconfigurable Computing - The BRASS reconfigurable computing group at Berkeley.

BEE + Insecta - The original Berkeley Emulation Engine + Insecta IC design flow.

(Last Updated: Feb 22, 2008)
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